A/D Global Data Register. Contains the result of the most recent A/D conversion.
| RESERVED | Reserved. These bits always read as zeros. |
| V_VREF | When DONE is 1, this field contains a binary fraction representing the voltage on the ADn pin selected by the SEL field, divided by the voltage on the VDD pin or as it falls within the range of VREFP to VREFN. Zero in the field indicates that the voltage on the ADn pin was less than, equal to, or close to that on VSS/VREFN, while 0xFFF indicates that the voltage on ADn was close to, equal to, or greater than that on VDD/VREFP. |
| RESERVED | Reserved. These bits always read as zeros. |
| CHN | These bits contain the channel from which the result bits V_VREF were converted. |
| RESERVED | Reserved. These bits always read as zeros. |
| OVERRUN | This bit is 1 in burst mode if the results of one or more conversions was (were) lost and overwritten before the conversion that produced the result in the V_VREF bits. |
| DONE | This bit is set to 1 when an A/D conversion completes. It is cleared when this register is read and when the ADCR is written. If the ADCR is written while a conversion is still in progress, this bit is set and a new conversion is started. |